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Marco Acevedo

Frontend Engineer

// puerto rico, pr · UTC-4

Electrical and Computer Engineer

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profile sourced from GitHub

Scouting report

Hardware-leaning engineer with dormant academic VHDL/C++ portfolio

assessed from open-source footprint

Junior
25signal

Marco's nine original repos lean hardware and systems — VHDL, C++, and Tcl from coursework like the COE3302 VHDL class — which is an unusual and welcome focus in this pool. That said, every repo is abandoned, there were no commits in the past year, and totals sit at zero stars with one follower across a five-year account. The originality signal reflects a genuine systems interest rather than shipped impact. Real strength in digital-design fundamentals is plausible, but the public footprint is stale and untested by collaborators.

Authorship & open source

Solo authorwrote 100% of commits on Assignment-SM-Chart-1
0 merged PRs0 commits / yr

What they build

Systems50%
Frontend40%
Backend10%

Signal breakdown

Originality72
Impact4
Consistency21
Polish4
Stars

0

Original repos

9

18% forks

Followers

1

On GitHub

5.2 yr

Live demos

0

Activity

Quiet

100% stale

Strengths

  • Verified author — wrote 100% of commits on Assignment-SM-Chart-1
  • Original builder — 9 of their own repositories
  • Systems focus with Frontend
  • Core stack: VHDL, C++, Tcl, JavaScript

About

Electrical and Computer Engineer — 11 public repositories and 1 followers on GitHub.

Skills

  • VHDL
  • C++
  • Tcl
  • JavaScript
  • HTML

Featured work